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PET REU 512Kb (1024Kb)



Conception

For the additional banking a second 6522 VIA must be added. We need three I/Os for switching A16-A18. The unused ports are for future upgrades. The second port is useful for a clock or building a fast serial with a max232. Also a battery will be added for data retention. Newer SRAMs only need 1.5V supply voltage for this function.


Banking Basics

The 512Kx8 Brilliance Semiconductor BS62LV4006 will be switched into 8 banks. Each bank will storage up to 64Kb data. 
Full address space will use in this case 16 lines (Cartridge port PIN B-U). 


 The pinout : BS62LV4006 /SC/SI/EC/EI/PC/PI -: PDIP32

                             +----------------+
                         A18 |1 *           32| VCC 
                         A16 |2             31| A15 
                         A14 |3             30| A17
                         A12 |4             29| WE 
                          A7 |5             28| A13
                          A6 |6             27| A8
                          A5 |7             26| A9
                          A4 |8             25| A11
                          A3 |9             24| OE
                          A2 |10            23| A10
                          A1 |11            22| CE
                          A0 |12            21| D7
                          D0 |13            20| D6
                          D1 |14            19| D5
                          D2 |15            18| D4
                         GND |16            17| D3
                             +----------------+

                 

                             A16  A17  A18   Bank
                             ----+----+-----+------ 
                               0    0    0     0
                               1    0    0     1
                               0    1    0     2
                               1    1    0     3                 
                               0    0    1     4
                               1    0    1     5
                               0    1    1     6
                               1    1    1     7 



Cartridge

The modified cartridge port. $8F00 must be changed to RESet. This I/O-address is in use for the SID-Chip.
So there is no need to keep this up. I/O1 ($8800) is the cartridge-box VIA. This line must be changed to
IRQ.
Also A0-A3 and PHI2 must be added to the expander. Datalines  are not buffered by the 74245 anymore ! You have
to bridge the existing bus-tranceiver or switch this by an additional logic.
This is the major change. To use the old 128kb Cartridge the datalines must be buffered.
Coming Mem-Carts will include the 74245-driver.

Please visit the development page for the old circuit.


(View : solder side)
                  1                   2 
1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2

A B C D E F H J K L M N P R S T U V W X Y Z


 Pin  Signal                           Pin  Signal

  1   I/O7 $8E00                        A   GND
  2   IRQ                               B   PA0
  3   I/O2 $8900                        C   PA1
  4   I/O3 $8A00                        D   PA2
  5   I/O4 $8B00                        E   PA3
  6   I/O5 $8C00                        F   PA4 
  7   I/O6 $8D00                        H   PA5  
  8   RESet                             J   PA6
  9   A3                                K   PA7
 10   A2                                L   PB0 
 11   A1                                M   PB1  
 12   A0                                N   PB2  
 13   PHI 2                             P   PB3   
 14   R/W                               R   PB4 
 15   D7                                S   PB5 
 16   D6                                T   PB6 
 17   D5                                U   PB7  
 18   D4                                V   CB1
 19   D3                                W   CB2
 20   D2                                X   VCC +5V=
 21   D1                                Y   CA1
 22   D0                                Z   CA2
 
 
Development

We use the existing 6522 for switching the address lines. CA2 and CB2 will switch up to 4 ICs with a 74139.
So there are piggyback 2MB possible. The coming software will use 1024KB.

Address overview :      $8800  Cartridge-Box VIA (address lines)
                        $8900  bus transceiver and SRAM (CS)
                        $8A00  additional 6522 VIA for banking (port A)
                        $8B00  ACIA (not in use yet)
                        

Schematic

The first wild wired development-cartridge works. 
The schematic shows the CPU-slot seen at the PET-SID PCB. Don't get confused about the pinout. You may replace
this connector with a 6502-socket. But remember you need the I/O-lines ($8800,$8900,$8A00).

PET-REU Schematic for PET-SID (CPU-SLOT)

PET-REU Schematic for 6502-Socket (decoded)
developers nightmare ;) At the backside you'll find the replaced bus-transceiver. Shame on me for that. ;)
But this was the only way to fix the design mistake. Please remove the 74245 from the Cartridge-Box and bridge the 8 datalines.
The ACIA is not in use yet. It's only an addon for serial communication.

SOURCE CODE




Setup Tool for PET-REU ACME-Source    PET-REU Setup PRG-Download

Your setup for the PET-REU. Formats all banks with $20.
The last distributed source was to bugged. I've kicked the verify.

Format 512KB Chip





!to "reuformat.prg"
*=$033c
;-------------------------------------------------------------------------------
;
; SYS 828 to start
; 
; Formatroutine for PET-REU  (only for CBM 3001 (ROMs) !)
;
; Compiler : ACME
;
; bin : 126 bytes
;
; This basic-routine is easy to modify. Use it stand-alone or as
; reconfigurable dropout for an option-rom.
;
; 19th,October,2K5 ; Bugfix: 22.October,2K5
;
;-------------------------------------------------------------------------------
;   (c) M. Sachse , http://www.cbmhardware.de
;                   http://www.cbmpet.de
;-------------------------------------------------------------------------------
;   
;    This program is free software; you can redistribute it and/or modify
;    it under the terms of the GNU General Public License as published by
;    the Free Software Foundation; either version 2 of the License, or
;    (at your option) any later version.
;
;    This program is distributed in the hope that it will be useful,
;    but WITHOUT ANY WARRANTY; without even the implied warranty of
;    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
;    GNU General Public License for more details.
;
;    You should have received a copy of the GNU General Public License
;    along with this program; if not, write to the Free Software
;    Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
;
;-------------------------------------------------------------------------------          
;Base addresses

 via       = $8800
 datalatch = $8900
 via_b     = $8A00
 BSOUT     = $FFD2 
 banks     = $0a
 
;---------------------------------------------------
; show text and setup via(s)
;---------------------------------------------------
            
                 lda #$93
                 jsr BSOUT           ; clear screen
                 ldx #13
                 lda #mes 
                 sta $20             ; and high byte 
                 JSR $CA23           ; show mes on screen
                 lda #255
                 sta via+2
                 sta via+3           ; ports to output
                 sta via_b+2
                 sta via_b+3
                 lda #00             ; set addr. $0000 in SRAM
                 sta via             ; register B
                 sta via+1           ; register A
                 lda #204            ; CA2/CB2 : %00
                 sta via+12          ; choose RAM-IC 0    

                 lda #00                  
                 sta banks
;---------------------------------------------------
; Looproutine for 8 banks
;---------------------------------------------------


bank             lda banks  
                 JSR $FDCD           ; put one space between bank counter
                 lda banks
                 JSR $E775           ; show written bank            
                 sta via_b+1         ; and set bank 0 (port a)
                 jsr ramcopy                                
                 lda banks           ; read banks
                 cmp #07             ; 8 ?    
                 bne bank
                 JSR $FDCD           ; put one space between bank counter
                 lda banks
                 JSR $E775           ; show written bank   
                 jmp end

;---------------------------------------------------
; 64K Format : Fillbyte : $00
;---------------------------------------------------

ramcopy          sei
                 ldx #00
        repump   ldy #00             ; low addr. counter
          pump   lda #00             ; fillbyte
                 sta datalatch       ; write byte to port    
                 iny
                 sty via+1           ; register A : set low addr.
                 bne pump
                 inx
                 stx via             ; register B : set high addr.
     pcounter    cpx #255            ; blocks
                 bne repump          ; damned, we do 256x256 Byte = 65536 Byte (64KB)
                 cli
                 inc banks           ; in 8 banks = 524288 words by 8bit 
end              rts   

;---------------------------------------------------

mes !TEXT "REU FORMAT : "
!Byte $0d


Letzte Änderung: 2016-12-13 14:30:17
  Rubrik:  CBM PET
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