CIA 6526

         +-----__-----+
    GND -| 1       40 |- CNT
    PA0 -| 2       39 |- SP
    PA1 -| 3       38 |- RS0
    PA2 -| 4       37 |- RS1
    PA3 -| 5       36 |- RS2
    PA4 -| 6       35 |- RS3
    PA5 -| 7       34 |- /RES
    PA6 -| 8       33 |- D0
    PA7 -| 9       32 |- D1
    PB0 -| 10      31 |- D2
    PB1 -| 11      30 |- D3
    PB2 -| 12      29 |- P4
    PB3 -| 13      28 |- D5
    PB4 -| 14      27 |- D6
    PB5 -| 15      26 |- D7
    PB6 -| 16      25 |- phi2
    PB7 -| 17      24 |- /FLAG
    /PC -| 18      23 |- /CS
    TOD -| 19      22 |- R / /W
    VCC -| 20      21 |- /IRQ
         +------------+




Signal Description of CIA 6526
------------------------------

 Pin(s)  Signal     Dir      Description

    1      GND       -       Ground (0V).

   2-9   PA0-PA7   progr.    Port A 0-7.

  10-17  PA0-PA7   progr.    Port B 0-7. With the control registers A and
                             B, bits 6 and 7 can be programmed to indicate
                             an underflow of timer A and B.

   18      /PC      out      Port control. Indicates availability of data
                             on port B or both ports [1].

   19      TOD       in      Time of day. A TTL signal carrying the mains
                             frequency (derived from the 9VAC) of 50Hz
                             (PAL) / 60Hz (NTSC) is applied here to trigger
                             the realtime clock.

   20      Vcc       -       Supply voltage (+5V DC).

   21      /IRQ     out      Interrupt ReQuest. Becomes LOW when it matches
                             a set bit in the interrupt control register on
                             ocurrence of the corresponding event.

   22      R/-W      in      Read/-Write. 0=read on data bus, 1=write on
                             data bus.

   23      /CS       in      Chip select. 0=coupled to data bus,
                             1=tri-state.

   24     /FLAG      in      Flag input. See /PC (pin 18).

   25     ø 2*       in      Phi 2. System clock signal. All data bus
                             action takes place only when ø2=1.

  26-33  DB7-DB0   in/out    Data bus.

   34      /RES      in      Reset. 0=reset the CIA to initial state.

  35-38  RS3-RS0     in      Register select. These four pins select on of
                             the CIA's internal registers.

   39       SP     in/out    Serial port. In/output of the shift register.

   40      CNT   in/out(?)   Counter. In/(output) of shift register clock
                             of trigger input for interval timer [1].


* The 'ø' is used as Greek 'phi' here.
progr. = programmable


Author: Marc-Jano Knopp on 97/12/12